In this work, two types of trench gate MOSFETs with integrated Schottky Barrier Diode (SBD) are demonstrated by numerical simulations. The presented structures feature a buried p layer (BL) inside the drift region, leading to superior tradeoff between first- and third-quadrant characteristics of SiC MOSFET. Also, effects of p-buried layers position with respect to the gate and source trenches on the device’s performances are revealed. The p-type islands embedded below the bottom of the trench regions (BLSI-MOS2) are found effective in shielding the contacts and reducing the leakage current even at high temperature of 225 °C. Furthermore, the BL is short to source contacts or floating so as to justify the connection’s effects on the dynamic characteristics. The results demonstrate that the reverse recovery charges (Q_rr) of the BLSI-MOS2 can be reduced to approximately zero when BL is grounded, and the critical short-circuit energy in it can be increased compared to that of the structure with floating BL. These results can provide guidance for design and modeling of 4H-SiC SBD-integrated trench MOSFET.

Silicon Carbide;trench MOSFET;integrated Schottky Barrier Diode;short-circuit capability