Effects of p-type Islands Configuration on the Electrical Characteristics of the 4H-SiC Trench MOSFETs with Integrated Schottky Barrier Diode
ID:148 View Protection:PUBLIC Updated Time:2021-08-23 23:51:19 Hits:532 Poster Presentation

Start Time:2021-08-27 12:50 (Asia/Shanghai)


Session:[P] Poster [P1] Poster 1

In this work, two types of trench gate MOSFETs with integrated Schottky Barrier Diode (SBD) are demonstrated by numerical simulations. The presented structures feature a buried p layer (BL) inside the drift region, leading to superior tradeoff between first- and third-quadrant characteristics of SiC MOSFET. Also, effects of p-buried layers position with respect to the gate and source trenches on the device’s performances are revealed. The p-type islands embedded below the bottom of the trench regions (BLSI-MOS2) are found effective in shielding the contacts and reducing the leakage current even at high temperature of 225 °C. Furthermore, the BL is short to source contacts or floating so as to justify the connection’s effects on the dynamic characteristics. The results demonstrate that the reverse recovery charges (Qrr) of the BLSI-MOS2 can be reduced to approximately zero when BL is grounded, and the critical short-circuit energy in it can be increased compared to that of the structure with floating BL. These results can provide guidance for design and modeling of 4H-SiC SBD-integrated trench MOSFET.
Silicon Carbide;trench MOSFET;integrated Schottky Barrier Diode;short-circuit capability
zhanwei shen
Institute of Semiconductors, Chinese Academy of Sciences

Zhanwei Shen received his B.S. degree from Xidian University, Xi’an, China, in 2012, and the Ph.D. degree from Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China, in 2017. He is currently an Assistant Professor with Institute of Semiconductors, Chinese Academy of Sciences. His research and development activities include SiC-based power device design, gate-oxide growth and characterization, and relevant device fabrication.

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