Modeling and Analysis of the Switching Characteristics Difference for Paralleling SiC MOSFETs in Multichip Power Modules
ID:45 Submission ID:68 View Protection:PUBLIC Updated Time:2021-08-20 20:39:34 Hits:613 Poster Presentation

Start Time:2021-08-27 12:23 (Asia/Shanghai)

Duration:1min

Session:[P] Poster » [P1] Poster 1

Abstract
Modeling and analysis of the 1200V/600A silicon carbide (SiC) MOSFET power module with multichip in parallel is investigated. And the different switching characteristics of parallel chips are analyzed. The equivalent circuits of both the current commutation power loop and the gate loop are derived. The parasitic parameters are extracted by ANSYS Q3D. The parasitic inductance in the power loop is studied considering the mutual influence. The unbalanced layout of the gate loop would cause different switching characteristics of the chips in parallel. A mathematical model is built to analyze the relationship between gate resistor and stray inductance. The unbalanced current sharing during the transient could be eased by changing the gate resistor of each chip. The switching characteristics of the SiC MOSFET power module are measured in the double pulse tester under 400V/375A condition. The results validate the analysis of parasitic parameters.
Keywords
SiC MOSFETs Modules,parallel laying,electromagnetic modeling,switching characteristics difference,ANSYS Q3D,parasitic inductance
Speaker
Wenyu Li
Fudan University; China; Shanghai; 200433

Submission Author
Wenyu Li Fudan University; China; Shanghai; 200433
Saijun Mao Fudan University;Shanghai;China
Zhikun Wang Fudan University
Shuhao Yang Fudan University
Yujie Ding Fudan University; China; Shanghai
Keqiu Zeng Ltd.;Philips Healthcare (Suzhou) Co.
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